Measuring I/O Behavior on Upcoming Systems with NVRAM
Date: Tuesday, November 14, 2017, 05:15 PM - 07:00 PM
Room: Four Seasons Ballroom
Type: Poster
Description: Upcoming HPC systems will use NVRAM to address existing I/O bottlenecks. The I/O performance thereby is one of the keys for the exascale challenges. NVRAM introduces a new level in the memory hierarchy and can be utilized by different technologies, e.g. memory mapped files or block transfer operations. Using NVRAM without considering the complete hierarchy may lead to an inefficient usage and bad I/O performance. Therefore, in this work, we evaluate techniques for measuring the I/O behavior of applications that utilize NVRAM in various use cases. We extended the application tracing of our tool Score-P and introduced several metrics as well as events for different use cases of NVRAM.
Links: Official link from SC17