November 13-18, 2016, Salt Lake City, Utah

Hands-On Practical Hybrid Parallel Application Performance Engineering

Date: Monday, November 14, 2016, 08:30 AM - 05:00 PM

Room: 250-B

Type: Tutorial

Description: This tutorial presents state-of-the-art performance tools for leading-edge HPC systems founded on the community-developed Score-P instrumentation and measurement infrastructure, demonstrating how they can be used for performance engineering of effective scientific applications based on standard MPI, OpenMP, hybrid combination of both, and increasingly common usage of accelerators. Parallel performance tools from the Virtual Institute – High Productivity Supercomputing (VI-HPS) are introduced and featured in hands-on exercises with Scalasca, Vampir, and TAU. We present the complete workflow of performance engineering, including instrumentation, measurement (profiling and tracing, timing and PAPI hardware counters), data storage, analysis, and visualization. Emphasis is placed on how tools are used in combination for identifying performance problems and investigating optimization alternatives. Using their own notebook computers with a provided HPC Linux [] OVA image containing all of the necessary tools (running within a virtual machine), participants will conduct exercises on the Stampede system at TACC where remote access to Intel Xeon and Intel Xeon Phi accelerator-based nodes will be provided for the hands-on sessions. This will help to prepare participants to locate and diagnose performance bottlenecks in their own parallel programs.

Links: Official link from SC16

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